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description the allegro ? A8732 is a xenon photoflash charger ic designed to meet the needs of ultra low power, small form factor cameras, particularly camera phones. by using primary-side voltage sensing, the need for a secondary-side resistive voltage divider is eliminated. this has the additional benefit of reducing leakage currents on the secondary side of the transformer. to extend battery life, the A8732 features very low supply current draw (0.5 a max in shutdown mode). the switch current limit can be programmed from 0.45 to 1.5 a, in 16 steps with single wire interface, through the charge pin. the igbt driver also has internal gate resistors for minimum external component count. the charge and trigger voltage logic thresholds are set at 1 v hi (min) to support applications implementing low-voltage control logic. the A8732 is available in an 8-contact 2 mm 2 mm dfn/mlp package with a 0.60 maximum overall package height, and an exposed pad for enhanced thermal performance. it is lead (pb) free with 100% matte tin leadframe plating. 8732-ds features and benefits ? ultra small 2 2 dfn/mlp-8 package ? low quiescent current draw (0.5 a max. in shutdown mode) ? primary-side output voltage sensing; no resistor divider required ? adjustable switch peak current limit up to 1.5 a with single-wire programming through the charge pin ? 1v logic (v hi (min)) compatibility ? integrated igbt driver with internal gate resistors ? optimized for mobile phone, 1-cell li+ battery applications ? zero-voltage switching for lower loss ? >75% efficiency ? charge complete indication ? integrated 50 v dmos switch with self-clamping protection ultra small mobile phone xenon photoflash capacitor charger with igbt driver package: 8-pin dfn/mlp (suffix ee) typical applications not to scale A8732 2 mm 2 mm, 0.60 mm height + sw vbat v in_vdrv control block charge vin_vdrv done gnd trig vpullup vout detect i sw sense done battery input 1.5 to 5.5 v c2 c out 100 ?? f 315 v c1 100 k igbt gate gate igbt driver figure 1. typical applications: (a) with single battery supply and (b) with separate bias supply (a) (b) + sw vbat v in_vdrv control block charge vin_vdrv done gnd trig vpullup vout detect i sw sense done battery input 2.3 to 5.5 v c2 c out 100 ?? f 315 v c1 100 k igbt gate gate igbt driver
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 2 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 selection guide part number packing package A8732eeetr-t 3000 pieces per reel 8-contact dfn/mlp with exposed thermal pad absolute maximum ratings characteristic symbol notes rating units sw pin v sw dc voltage. (v sw is self-clamped by internal active clamp and is allowed to exceed 50 v during flyback spike durations. maximum repetitive energy during flyback spike: 0.5 j at frequency 400 khz.) ?0.3 to 50 v i sw dc current, pulse width = 1 ms 3 a vin_drv, vbat pins v in ?0.3 to 6.0 v charge, trig, d o n e pins care should be taken to limit the current when ?0.6 v is applied to these pins. ?0.6 to v in + 0.3 v v remaining pins ?0.3 to v in + 0.3 v v operating ambient temperature t a range e ?40 to 85 oc maximum junction t j (max) 150 oc storage temperature t stg ?55 to 150 oc thermal characteristics may require derating at maximum conditions characteristic symbol test conditions* value units package thermal resistance r ja 4-layer pcb, based on jedec standard 49 oc/w *additional thermal information available on allegro web site.
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 3 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 functional block diagram vbat sw gnd ocp charge v ds ref t on (max) t off (max) done trig vin_drv dmos v sw ? v bat q q s r q q s r dcm detector ilim reference h m l triggered timer control logic 18 s 18 s enable v in_drv igbt driver gate decoder pin-out diagram (top view) done trig gate gnd charge vin_drv vbat sw pad 1 2 3 4 8 7 6 5 terminal list number name function 1 d o n e open collector output, pulls low when output reaches target value and charge is high. goes high during charging or whenever charge is low. 2 trig igbt trigger input. 3 gate igbt gate drive output. 4 gnd ground connection. 5 sw drain connection of internal dmos switch. connect to transformer primary winding. 6 vbat battery voltage. 7 vin_drv input voltage. connect to 3 to 5.5 v bias supply. decouple v in voltage with 0.1 f ceramic capacitor placed close to this pin. 8 charge charge enable and current limit serial programming pin. set this pin low to shut down the chip. ? pad exposed pad for enhanced thermal dissipation. connect to ground plane.
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 4 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 continued on the next page? electrical characteristics typical values are valid at v in = v bat = 3.6 v; t a = 25c, except indicates specifications guaranteed from ? 40c to 85c ambient, unless otherwise noted characteristics symbol test conditions min. typ. max. unit vbat voltage range v bat (note 1) 1.5 ? 5.5 v vin_drv voltage range v in (note 1) 2.3 ? 5.5 v uvlo enable threshold v inuv v in rising ? 2.05 2.2 v uvlo hysteresis v inuv(hys) ? 150 ? mv v in supply current i in shutdown (charge = 0 v, trig = 0 v) ? 0.02 0.5 a charging complete ? 50 100 a charging (charge = v in , trig = 0 v) ? 2 ? ma vbat pin supply current i bat shutdown (charge = 0 v, trig = 0 v) ? 0.01 1 a charging done (charge = v in , d o n e = 0 v) ? ? 5 a charging (charge = v in , trig = 0 v) ? ? 50 a current limit primary-side current limit i swlim 100% setting (note 2) 1.35 1.5 1.65 a switch current limit (ilim programming input on charge pin) i swlim1 default setting ? 100 ? % i swlim2 one pulse applied to charge pin ? 95 ? % i swlim3 two pulses applied to charge pin ? 90 ? % i swlim4 three pulses applied to charge pin (note 3) ?86? % i swlim5 four pulses applied to charge pin ? 81 ? % i swlim6 five pulses applied to charge pin (note 3) ? 76 ? % i swlim7 six pulses applied to charge pin (note 3) ? 71 ? % i swlim8 seven pulses applied to charge pin (note 3) ?67? % i swlim9 eight pulses applied to charge pin ? 62 ? % i swlim10 nine pulses applied to charge pin (note 3) ? 57 ? % i swlim11 ten pulses applied to charge pin (note 3) ? 52 ? % i swlim12 eleven pulses applied to charge pin (note 3) ?48? % i swlim13 twelve pulses applied to charge pin (note 3) ?43? % i swlim14 thirteen pulses applied to charge pin (note 3) ?38? % i swlim15 fourteen pulses applied to charge pin (note 3) ?33? % i swlim16 fifteen pulses applied to charge pin (note 3) ?29? %
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 5 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 switch on-resistance r swds(on) v in_drv = 3.6 v, i d = 600 ma, t a = 25c ? 0.4 ? switch leakage current i swlk v sw = 5.5, over full temperature range (note 1) ? ? 2 a charge pull-down resistance r chgpd ? 100 ? k charge input voltage v charge high, over input supply range (note 1) 1.0 ? ? v low, over input supply range (note 1) ? ? 0.4 v charge pin programming ilim programming high at charge pin t ilim(h)init initial pulse (note 3) 15 ? ? s t ilim(h) subsequent pulses (note 3) 0.2 ? ? s ilim programming low at charge pin t ilim(l) (note 3) 0.2 ? ? s total ilim setup time at charge pin t ilim(su) (note 3) ? 200 ? s switch-off timeout t off(max) ? 18 ? s switch-on timeout t on(max) ? 18 ? s output comparator trip voltage v outtrip measured as v sw ? v bat (note 4) 31 31.5 32 v output comparator voltage overdrive v outov pulse width = 200 ns (90% to 90%) ? 200 400 mv d o n e leakage current i donelk (note 1) 1 a d o n e output low voltage v donel 32 a into d o n e pin (note 1) ? ? 100 mv dv/dt threshold for zvs comparator dv/dt measured at sw pin ? 20 ? v/ s igbt driver trig input voltage v trig(h) input = logic high, over input supply range (note 1) 1.0 ? ? v v trig(l) input = logic low, over input supply range (note 1) ? ? 0.4 v trig pull-down resistor r trigpd ? 100 ? k gate resistance to vin_drv r srcds(on) v gate = 1.8 v ? 21 ? gate resistance to gnd r snkds(on) v gate = 1.8 v ? 27 ? propagation delay (rising) t dr measurement taken at gate pin, c l = 6500 pf (notes 3, 5) ? 25 ? ns propagation delay (falling) t df (notes 3, 5) ? 60 ? ns output rise time t r (notes 3, 5) ? 290 ? ns output fall time t f (notes 3, 5) ? 380 ? ns gate pull-down resistor r gtpd ? 20 ? k 1 specifications throughout the range t a = ?40c to 85c guaranteed by design and characterization. 2 current limit guaranteed by design and correlation to static test. 3 guaranteed by design and characterization. 4 specifications throughout the range t a = ?20c to 85c guaranteed by design and characterization. 5 see igbt drive timing definition diagram for further information. electrical characteristics (continued) typical values are valid at v in = v bat = 3.6 v; t a = 25c, except indicates specifications guaranteed from ? 40c to 85c ambient, unless otherwise noted
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 6 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 igbt drive timing definition gate trig t dr t r t df t f 50% 10% 90% 50% 10% 90% operation timing diagram high transition at the charge pin. v out charge done v in vbat trig gate sw ab explanation of events a: start charging by pulling charge to high, provided that v in is above uvlo level. b: charging stops when v out reaches the target voltage . c: start a new charging process with a low-to- d: pull charge to low to put the controller in low-power standby mode. e: charging does not start, because v in is below uvlo level when charge goes high. f: after v in goes above uvlo, another low-to-high transition at the charge pin is required to start the charging. uvlo target v out cdef t3 t1 t2 t1, t2, t3 (trigger instances): igbt driver output pulled high whenever the trig pin is at logic high. it is recommended to avoid applying any trigger pulses during charging.
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 7 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 characteristic performance igbt drive performance igbt drive waveforms are measured at pin, with capacitive load of 6800 pf rising signal symbol parameter units/division c1 v trigger 1 v c2 v gate 1 v c3 v in 1 v t time 100 ns conditions parameter value t dr 23 ns t r 320 ns c load 6.8 nf symbol parameter units/division c1 v trigger 1 v c2 v gate 1 v c3 v in 1 v t time 100 ns conditions parameter value t dr 58 ns t r 402 ns c load 6.8 nf c1 c1 c2,c3 c2,c3 t v gate v trigger v in falling signal t r v gate v in v trigger t t f
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 8 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 characteristic performance 0 2 4 6 8 10 12 14 16 18 20 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 time (sec) battery voltage (v) ilim13 (0.65a) ilim11 (0.79a) ilim9 (0.93a) ilim7 (1.07a) ilim5 (1.22a) ilim3 (1.36a) ilim1 (1.50a) 54% 56% 58% 60% 62% 64% 66% 68% 70% 72% 74% 76% 78% 80% 82% 84% 86% 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 efficiency (%) ilim13 (0.65a) ilim11 (0.79a) ilim9 (0.93a) ilim7 (1.07a) ilim5 (1.22a) ilim3 (1.36a) ilim1 (1.50a) efficiency versus battery voltage at various ilim transformer l primary = 12.8 h, n =10.25, v in =3.6 v, at room temperature charge time versus battery voltage at various ilim transformer l primary = 12.8 h, n =10.25, v in =3.6 v, c out = 100 f / 330 v ucc, at room temperature
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 9 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 320 321 322 323 324 325 326 327 328 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 battery voltage (v) ilim15 (0.51a) ilim13 (0.65a) ilim11 (0.79a) ilim9 (0.93a) ilim7 (1.07a) ilim5 (1.22a) ilim3 (1.36a) ilim1 (1.50a) 320 321 322 323 324 325 326 327 328 150 200 250 300 350 400 450 500 550 600 650 v out (v) v out (v) t off (ns) 5.0 4.2 3.6 2.2 v bat (v) note: output voltage is sensed from the primary side winding when the switch turns off. this duration, t off , has to be long enough (>200 ns) in order to obtain an accurate measurement. the value of t off depends on i swlim , primary inductance, l primary , and the turns ratio, n, as given by: t off = (i swlim l primary n) / v out . final output voltage versus battery voltage at various ilim transformer l primary = 12.8 h, n =10.25, v in =3.6 v, at room temperature final output voltage versus secondary side conduction time at various battery voltages transformer l primary = 12.8 h, n =10.25, v in =3.6 v, at room temperature
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 10 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 current (a) battery voltage (v) ilim1 (1.50a) ilim3 (1.36a) ilim5 (1.22a) ilim7 (1.07a) ilim9 (0.93a) ilim11 (0.79a) ilim13 (0.65a) ilim15 (0.51a) note: peak switch current is limited by the maximum on-time and di/dt of the transformer primary current; therefore, average input current drops at very low battery voltage. average input current versus battery voltage at various ilim transformer l primary = 12.8 h, n =10.25, v in =3.6 v, at room temperature
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 11 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 charging waveforms output capacitor charging at various peak current limits test conditions: v in = 3.0 v, v bat = 3.7 v, c out = 100 f / 330 v ucc, transformer = t-16-024a (l primary =12.8 h, n = 10.25), at room temperature oscilloscope settings: ch1 = d o n e (5 v / div), ch2 = output voltage (50 v / div), ch3 = input current (100 ma / div), time scale = 1 sec / div t v out i in v done c2,c3 c1 v out i in v done c2,c3 c1 v out i in v done c2,c3 c1 v out i in v done c2,c3 c1 ilim9 (0.93 a) ilim5 (1.22 a) ilim1 (1.5 a) ilim11 (0.79 a)
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 12 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 output capacitor charging at various battery voltages test conditions: v in = 3.0 v, ilim3 (1.36 a), c out = 100 f / 330 v ucc, transformer = t-16-024a (l primary =12.8 h, n = 10.25), at room temperature oscilloscope settings: ch1 = d o n e (5 v / div), ch2 = battery voltage (1 v / div), ch3 = output voltage (50 v / div), ch4 = input current (100 ma v / div), time scale = 1 sec / div t v out i in v done v bat c2,c3,c4 c1 v out i in v done v bat c2,c3,c4 c1 v bat = 4.2 v v bat = 3.7 v v bat = 3.0 v v bat = 5.0 v v out i in v done v bat c2,c3,c4 c1 v out i in v done v bat c2,c3,c4 c1
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 13 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 functional description general operation overview the charging operation is started by a low-to-high signal on the charge pin, provided that v in is above the v uvlo level. it is strongly recommended to keep the charge pin at logic low during power-up. after v in exceeds the uvlo level, a low- to-high transition on the charge pin is required to start the charging. the d o n e open-drain indicator is pulled low when charge is high and target output voltage is reached. the primary peak current is set to 1.5 a by default, but it can be programmed from 1.5 a down to approximately 0.44 a in 15 steps. see the ilim programming section for details. when a charging cycle is initiated, the transformer primary side current, i primary , ramps-up linearly at a rate determined by the combined effect of the battery voltage, v bat , and the primary side inductance, l primary . when i primary reaches the current limit, i swlim , the internal mosfet is turned off immediately, allowing the energy to be pushed into the photoflash capacitor, c out , from the secondary winding. the secondary side current drops linearly as c out charges. the switching cycle starts again, either after the transformer flux is reset, or after a predetermined time period, t off (max) (18 s), whichever occurs first. the A8732 senses output voltage indirectly on primary side. this eliminates the need for high voltage feedback resistors required for secondary sensing. flyback converter stops switching when output voltage reaches: v out = k n ? v d , where: k = 31.5 v typically, v d is the forward drop of the output diode (approximately 2 v), and n is transformer turns ratio. switch on-time and off-time control the A8732 implements an adaptive on-time/off-time control. on- time duration, t on , is approximately equal to t on = i swlim l primary / v bat . off-time duration, t off , depends on the operating conditions during switch off-time. the A8732 applies two charging modes: fast charging mode and timer mode, according to the conditions described in the next section. timer mode and fast charging mode the A8732 achieves fast charging times and high efficiency by operating in discontinuous conduction mode (dcm) through most of the charging process. the relationship of timer mode and fast charging mode is shown in figure 2. the ic operates in timer mode when beginning to charge a com- pletely discharged photoflash capacitor, usually when the output voltage, v out , is less than approximately 30 v (depending on transformer used). timer mode is a fixed period, 18 s, off-time control. one advantage of having timer mode is that it limits the initial battery current surge and thus acts as a ?soft-start.? a time- expanded view of a timer mode interval is shown in figure 3. figure 2. timer mode and fast charging mode: v out = 50 v/div, i in = 100 ma/div., v in = v bat = 3.6 v, c out = 100 f / 330 v, ilim = 1.0 a, and t = 1 s/div. figure 3. expanded view of timer mode: v out 10 v, v bat = 5.5 v, ch1: v out = 20 v / div., ch2: v bat = 5 v / div., ch3: v sw = 5 v / div., ch4: i sw = 500 ma / div., t = 5 s / div. v out i in c2,c3 c4 c1 v out v sw i sw v bat
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 14 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 as soon as a sufficient voltage has built up at the output capaci- tor, the ic enters fast-charging mode. in this mode, the next switching cycle starts after the secondary side current has stopped flowing, and the switch voltage has dropped to a minimum value. a proprietary circuit is used to allow minimum-voltage switch- ing, even if the sw pin voltage does not drop to 0 v. this enables fast-charging mode to start earlier, thereby reducing the overall charging time. minimum-voltage switching is shown in figure 4. during fast-charging mode, when v out is high enough (over 50 v), true zero-voltage switching (zvs) is achieved. this further improves efficiency as well as reduces switching noise. a zvs interval is shown in figure 5. figure 4. minimum-voltage switching: v out 35 v, v bat = 5.5 v, ch1: v out = 20 v / div., ch2: v bat = 5 v / div., ch3: v sw = 5 v / div., ch4: i sw = 500 ma / div., t = 1 s / div. figure 5. true zero-voltage switching (zvs): v out = 75 v, v bat = 5.5 v, ch1: v out = 20 v / div., ch2: v bat = 5 v / div., ch3: v sw = 5 v / div., ch4: i sw = 500 ma / div., t = 0.5 s / div. c2,c3 c4 c1 v out v sw i sw v bat c2,c3 c4 c1 v out v sw i sw v bat
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 15 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 ilim programming the peak current limit can be programmed to sixteen differ- ent levels, from 100% to 29%, with programming through the charge pin. an internal digital circuit decodes the input clock signals, which sets the switch current limit. this flexible scheme allows the user to operate the A8732 at required current limits. the battery life can be effectively extended by setting a lower cur- rent limit at low battery voltages. figure 6 shows the ilim clock timing scheme protocol. the total ilim setup time, t ilim(su) , denotes the time needed for the decoder circuit to receive ilim inputs and set i swlim , and has a typical duration of 200 s. figure 7 shows the timing definition of the primary current limiting circuit. at the end of the setup period, t ilim(su) , primary current starts to ramp up to the set i swlim . the i swlim setting remains in effect as long as the charge pin is high. to reset the ilim decoder, pull the charge pin low before clocking-in the new setting. after the first start-up or an ilim decoder reset, each new current limit can be set by sending a burst of pulses to the charge pin. the first rising edge starts the ilim decoder, and up to 16 rising edges will be counted to set the iswlim level. the first pulse width, t ilim1(h) , must be at least 15 s long. subsequent pulses (up to 15 more) can be as short as 0.2 s. the last low- to-high edge must arrive within 200 s from the first edge. the charge pin will stay high afterwards. (0 to 15) figure 6. ilim programming timing definition figure 7. current limit timing example (i swlim4 selected)
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 16 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 applications information transformer design 1. the transformer turns ratio, n, determines the output voltage: n = n s / n p v out = 31.5 n ? v d , where 31.5 is the typical value of v outtrip , and v d is the for- ward drop of the output diode. 2. the primary inductance, l primary , determines the on-time of the switch: t on = (? l primary / r ) ln (1 ? i swlim r / v in ) , where r is the total resistance in the primary current path (includ- ing r swds(on) and the dc resistance of the transformer). if v in is much larger than i swlim r, then t on can be approxi- mated by: t on = i swlim l primary / v in . 3. the secondary inductance, l secondary , determines the off- time of the switch. given: l secondary / l primary = n n , then t off = ( i swlim / n ) l secondary / v out = ( i swlim l primary n ) / v out . the minimum pulse width for t off determines what is the mini- mum l primary required for the transformer. for example, if ilim8 = 1.0 a, n = 10, and v out = 315 v, then l primary must be at least 6.3 h in order to keep t off at 200 ns or longer. these relationships are illustrated in figure 8. in general, choosing a transformer with a larger l primary results in higher efficiency (because a larger l primary corresponds to a lower switch frequency and hence lower switching loss). but transformers with a larger l primary also require more windings and larger magnetic cores. therefore, a trade-off must be made between transformer size and efficiency. leakage inductance and secondary capacitance the transformer design should minimize the leakage induc- tance to ensure the turn-off voltage spike at the sw node does not exceed the absolute maximum specification on the sw pin (refer to the absolute maximum ratings table). an achievable minimum leakage inductance for this application, however, is usually compromised by an increase in parasitic capacitance. furthermore, the transformer secondary capacitance should be minimized. any secondary capacitance is multiplied by n 2 when reflected to the primary, leading to high initial current swings when the switch turns on, and to reduced efficiency. figure 8. transformer selection relationships v sw v sw v in v in i sw i sw t on t off v r t f t neg
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 17 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 input capacitor selection ceramic capacitors with x5r or x7r dielectrics are recom- mended for the input capacitor, c in . during initial timer mode the device operates with 18 s off-time. the resonant period caused by input filter inductor and capacitor should be at least 2 times greater or smaller than the 18 s timer period, to reduce input ripple current during this period. the typical input lc filter is shown in figure 9. the resonant period is given by: t res = 2 ( l c in ) 1/2 . the effects of input filter components are shown in figures 10, 11, and 12. it is recommended to use at least 10 f / 6.3 v to decouple the battery input, vbat , at the primary of the trans- former. decouple the vin pin using 0.1 f / 6.3 v bypass capacitor. output diode selection choose rectifying diodes, d1, to have small parasitic capacitance (short reverse recovery time) while satisfying the reverse voltage and forward current requirements. the peak reverse voltage of the diodes, v dpeak , occurs when the internal mosfet switch is closed. it can be calculated as: v dpeak = v out + n v bat . the peak current of the rectifying diode, i dpeak , is calculated as: i dpeak = i primary_peak / n . + c in A8732 v bat l in figure 9. typical input section with input inductance (inductance, l in , may be an input filter inductor or inductance due to long wires in test setup) effects of input filters figure 10. input current waveforms with li+ battery connected by 5-in. wire and decoupled by 4.7 f capacitor, c out = 100 f, v in = v bat = 3.6 v, ch1: v out = 50 v/div, ch2: v bat = 2 v/div, ch3: i bat = 500 ma/div, t = 1 s/div figure 11. input current waveforms with li+ battery connected through 4.7 h inductor and 4.7 f capacitor, c out = 100 f, v in = v bat = 3.6 v, ch1: v out = 50 v/div, ch2: v bat = 2 v/div, ch3: i bat = 200 ma/div, t = 1 s/div figure 12. input current waveforms with li+ battery connected through 4.7 h inductor and 10 f capacitor, c out = 100 f, v in = v bat = 3.6 v, ch1: v out = 50 v/div, ch2: v bat = 2 v/div, ch3: i bat = 200 ma/div, t = 1 s/div v out v bat i bat c3 c2 c1 v out v bat i bat c2 c3 c1 v out v bat i bat c2 c3 c1
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 18 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 layout guidelines key to a good layout for the photoflash capacitor charger circuit is to keep the parasitics minimized on the power switch loop (transformer primary side) and the rectifier loop (secondary side). use short, thick traces for connections to the transformer primary and sw pin. it is important that the d o n e signal trace and other signal traces be routed away from the transformer and other switching traces, in order to minimize noise pickup. in addition, high voltage isolation rules must be followed carefully to avoid breakdown failure of the circuit board. avoid placing any ground plane area underneath the transformer secondary and diode, to minimize parasitic capacitance. for low threshold logic (<1.2 v) add 1 nf capacitors across the charge and trigger pins to gnd to avoid malfunction due to noise. connect the ee package pad to the ground pad for better ther- mal performance. use ground planes on the top and bottom layers below the ic and connect them through multiple thermal vias. refer to the figures on page 18 for recommended layout. recommended components component rating part number source c1, input capacitor 10 f, 10%, 6.3 v, x5r ceramic capacitor (0805) jmk212bj106k taiyo yuden c2 0.1uf, 6.3v x5r ceramic capacitor c out , photoflash capacitor 100 f / 330 v eph-31ell101b131s chemi-con d1, output diode 2 x 250 v, 225 ma, 5 pf bav23s philips semiconductor, fairchild semiconductor t1, transformer l primary = 12.8 h, n= 10.25, 6.5 8 4 mm t-16-024a tokyo coil electric
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 19 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 recommended layout: schematic top side bottom side top components 0.1uf c4 10uf c2 vbat trigger charge done cout1 100uf 3 4 1 2 x2 tce_t-16-024a 12 rg sw 5 charge 8 gate 3 done 1 vin_drv 7 trig 2 gnd 4 vbat 6 u1 vout tp_gate 2k r10 3 1 2 d1 bav23s 1nf c5 1nf c6 A8732
ultra small mobile phone xenon photoflash capacitor charger with igbt driver 20 allegro microsystems, inc. 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com A8732 copyright ?2008-2010, allegro microsystems, inc. the products described here are manufactured under one or more u.s. patents or u.s. patents pending. allegro microsystems, inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per- mit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, inc. assumes n o re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. package ee 8-contact dfn/mlp with exposed thermal pad 1.60 8 8 2 1 2 1 a a terminal #1 mark area b exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion) all dimensions nominal, not for tooling use (reference jedec mo-229uccd) dimensions in millimeters exact case and lead configuration at supplier discretion within limits shown c reference land pattern layout (reference ipc7351 son50p200x200x100-9m); all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51-5) b pcb layout reference view 0.90 1.60 0.30 1 8 0.50 0.83 2.13 c 0.90 0.55 +0.05 ?0.04 2.00 0.15 2.00 0.15 0.25 0.05 0.325 0.050 0.50 bsc c 0.08 d d coplanarity includes exposed thermal pad and terminals c seating plane 9x

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